2.verilog 语法学习与应用

计数器实验升级，设计让8个LED灯以每个 0.5s 的速率循环闪烁(跑马灯)

led_run

//8个灯各亮500us，便于快速地得到波形
module led_run(
    Clk,
    Reset_n,
    Led
    );
    input Clk;
    input Reset_n;
    output reg [7:0] Led;
    //500 000 000ns/20ns=25000 000 转化成二进制数是25位
    //reg [24:0] counter;
    reg [14:0] counter;
    always @(posedge Clk or negedge Reset_n)
        if(!Reset_n)
             counter <= 0;
		//比如0-1，1-2，2-0， n是2，算上归位要变化3次，都算在时间内，但计数是n-1
        //else if(counter == 25'd24999999)
        else if(counter == 15'd24999)
            counter <= 0;
        else
            counter <= counter + 1'b1;
            
     always @(posedge Clk or negedge Reset_n)
        if(!Reset_n)
            Led <= 8'b00000001;
       // else if(counter == 25'd24999999)begin
         else if(counter == 15'd24999)begin
            if(Led == 8'b10000000)
            //手动到达起点状态
                Led <= 8'b00000001;
            else
            //时间到达500us，移位
            Led <= Led << 1;
        end
        else
            Led <= Led;
        
endmodule

led_run_tb

`timescale 1ns / 1ps

module led_run_tb();
    reg Clk;
    reg Reset_n;
    wire [7:0] Led;
    
    led_run DUT(
        .Clk(Clk),
        .Reset_n(Reset_n),
        .Led(Led)
    );
    //每隔10ns翻转一次，会形成周期为20ns的时钟信号
    initial Clk = 1;
    always #10 Clk = ~Clk;
    
    initial begin
        Reset_n = 0;
        #201;
        Reset_n = 1;
        //运行4ms，8个灯闪一回要500us*8=4ms
        #4000000;
        $stop;
     
    end
endmodule

仿真波形

绑定管脚进行板上验证

下面生成比特流并下载至板中地步骤省略…